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Direct DMA Transfers
Direct DMA Transfers
CorePCIF supports direct DMA transfers. In this mode, the data used for the PCI transfer is read from or written to
one of the internal DMA registers rather than the backend interface. Figure 6-54 and Figure 6-55 on page 102 show a
PCI write cycle and a PCI read cycle.
cycle
B0 B1 B2 B3 B4 B5 B6 28 29 A0 A1 A2 A3
0
1
2
3
4
5
6
7
8
clk
framen
cben[3:0]
ad[31:0]
par
devseln
irdyn
trdyn
reqn
gntn
be_req
be_gnt
be_address[7:0]
be_write
be_read
mast_active
dp_start
dp_done
rd_cyc
50 54 58 5C
7
ADDR
0
0
mem_data_in[31:0]
ADDR DATA
4 CR
Figure 6-54 · Direct DMA Write to the PCI Bus
v4.0
101
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相关PDF资料
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IP MODULE COREU1LL
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CP2-GSA-L
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